1. Field of Art
The disclosure generally relates to the emulation of circuits, and more specifically to detecting whether at least one signal from a plurality of signals has changed its state in an emulated circuit.
2. Description of the Related Art
Emulators have been developed to assist circuit designers in designing and debugging highly complex integrated circuits. An emulator includes multiple reconfigurable components, such as field programmable gate arrays (FPGAs) that together can imitate the operations of a design under test (DUT). By using an emulator to imitate the operations of a DUT, designers can verify whether a DUT complies with various design requirements prior to a fabrication.
An aspect of emulation includes detecting among a plurality of traced signals whether at least one event has occurred (e.g., a change in a state of a signal). Detecting an event among the plurality of signals can be used, for example, to verify functionality of a DUT, estimate power consumption of a DUT, perform logic analysis, or control operations of the DUT.
For detecting an event among a plurality of signals, a conventional emulation environment implements numerous hardware resources including multiple registers, multiple XOR gates and at least one OR gate. A DUT may include billions of signals to be monitored, thus a great amount of hardware resources have to be implemented by the emulator for tracing a large number of signals. A first drawback of allocating a large amount of hardware resources for tracing signals is that these resources occupy equivalent spaces that could be used to implement the design, either logic gates in an FPGA or transistors in a specialized ASIC for emulation. A second drawback is a potential slowdown of the DUT.
Therefore, a conventional emulation environment is inefficient in terms of hardware resources for detecting that at least one event has occurred in a plurality of signals.